Manufacturing method of a semiconductor device utilizing a flexible adhesive tape

ABSTRACT

A method of manufacturing a thin, small-sized, inexpensive, non-leaded, resin-sealed type semiconductor device is disclosed. A flexible tape having plural terminals peelably through a first adhesive in a product forming portion formed on a main surface of the tape is provided, a semiconductor element is fixed to the main surface of the tape peelably through a second adhesive, electrodes formed on the semiconductor element and the terminals are connected together through conductive wires, an insulating resin layer is formed in an area including the semiconductor element and the wires on the main surface of the tape to cover the semiconductor element and the wires, and the tape on a back surface of the insulating resin layer is peeled, allowing the terminals to be exposed to the back surface of the insulating resin layer. Exposed surfaces of the terminals are each formed by a gold layer. The terminals each comprise a main metal layer of copper foil and one or plural auxiliary metal layers formed on each of a main surface and a back surface of the main metal layer. The auxiliary metal layer(s) on the main surface of the main metal layer is (are) formed using a material which affords a rough surface, thereby roughening the main surface side of each terminal.

BACKGROUND OF THE INVENTION

The present invention relates to a resinsealed type semiconductor deviceand a method of manufacturing the same. Particularly, the presentinvention is concerned with a technique applicable effectively to themanufacture of a semiconductor device (nonleaded semiconductor device)such as SON (small outline no leaded package) and QFN (quad flatnon-leaded package) in which external electrode terminals are exposed toa packaging side without being intentionally projected sideways of asealing member.

In manufacturing a resin sealed type semiconductor device there is useda lead frame. The lead frame is fabricated by forming a metallic plateinto a desired pattern by punching with use of a precision press or byetching. The lead frame has a support portion called tab or die pad forfixing a semiconductor element (semiconductor chip) and also has pluralleads whose front ends (inner ends) are positioned around the saidsupport portion. The tab is supported by tab suspending leads extendingfrom a frame portion of the lead frame.

For manufacturing a resin sealed type semiconductor device with use ofsuch a lead frame, a semiconductor chip is fixed onto the tab of thelead frame,electrodes on the semiconductor chip and the inner ends ofthe leads are connected together through conductive wires, then the leadinner end side including the wires and the semiconductor chip is sealedwith resin so as to fill up a gap and form a sealing member (resinsealing member or package), thereafter unnecessary lead frame portionsare cut off and so are the leads and tab suspending leads projectingfrom the package.

On the other hand, as one of resin-sealed type semiconductor devicesmanufactured using a lead frame there is known a semiconductor device(non-leaded semiconductor device) in which a package is formed on oneside (main surface side) of a lead frame by one-side molding and leadsas external electrode terminals are exposed to one surface of thepackage. As this type of semiconductor devices there are known SON inwhich leads are exposed to both side edges of one surface of a packageand QFN in which leads are exposed to four sides of one surface of aquadrangular package.

In Japanese Unexamined Patent Publication No. 2000-77596 there isdisclosed a technique for manufacturing a resin-sealed semiconductordevice of an electrode bottom-exposed type which uses two types of leadframes and a resin film. According to this manufacturing technique,first there are provided a lead frame provided inside a frame with leadsserving as both a first signal connecting lead portion and a firstexternal terminal portion and leads serving as both a second signalconnecting lead portion and a second external terminal portion, as wellas a lead frame having a die pad for fixing a semiconductor element.

Next, a resin film is brought into close contact with a bottom of theframe of the former lead frame, while the die pad is taken out of thelatter lead frame and is fixed onto the resin film exposed centrally ofthe frame.

Then, a semiconductor element is fixed onto the die pad, followed bywire bonding, then a sealing resin layer is formed on the frame to coverthe semiconductor element and the wires, thereafter the resin film isremoved, and the leads projecting from the sealing resin are cut off tofabricate a resin-sealed type semiconductor device in which the externalterminals and the die pad are exposed to the back side of the sealingresin layer.

As one of semiconductor devices there is known TBGA (Tape Ball GridArray) which is fabricated using an insulating tape. In JapaneseUnexamined Patent Publication No. Hei 11 (1999)-354673 there isdisclosed a semiconductor device wherein, for the reduction of cost andthickness, electrodes are formed on the back side of a molding resinsealing layer using a film carrier tape. The electrodes project fromends of the molding resin sealing layer.

From the standpoint of reducing the size of a semiconductor device andpreventing bend of leads serving as external electrode terminals, thereare used non-leaded semiconductor devices such as SON and QFN fabricatedby one-side molding. In a non-leaded semiconductor device, a leadsurface exposed to one side of a package serves as a packaging surfaceand therefore the packaging area is small in comparison with such asemiconductor device as SOP (Small Outline Package) or QFP wherein leadsare projected from side faces of a package, but since external terminalsare arranged in one row along an outer periphery of a semiconductorchip, an increase in size of the package is unavoidable with an increasein the number of external terminals, thus giving rise to the problemthat such an increase of the package size is unsuitable for constructinga semiconductor device having a larger number of pins. If externalterminals are arranged along an outer periphery of a semiconductor chipin the form of an array comprising plural rows and plural columns, asdescribed in Japanese Unexamined Patent Publication No. 2000-77596,there accrues an advantage that a larger number of external terminalscan be provided even in a smaller package profile. However, forming sucha construction by utilizing a lead frame leads to an increase of cost.

More particularly, in order to ensure a sufficient strength of a leadframe as a frame portion for holding the entire product in eachmanufacturing step, it is necessary that external terminals be formedusing a metallic plate having a sufficient thickness. Thus, it isdifficult to reduce the material cost.

Forming a thick metallic plate into a desired pattern with a highaccuracy by selective etching or using a precision press is difficult asnoted above. In addition, disposing formed external terminal parts ontoa resin film requires much time and labor, as described in JapaneseUnexamined Patent Publication No. 2000-77596.

On the other hand, in the case of TBGA fabricated using an insulatingtape, the tape cost is high, thus obstructing the attainment of reducingthe cost of the semiconductor device. That is, the tape which has beenused remains within the resulting product because it constitutes a partof the semiconductor device. For ensuring the performance required ofproduct, it is necessary to use a tape of resin (e.g., a tape ofpolyimide resin) superior in heat resistance and moisture resistance.

Thus, the use of an expensive material is unavoidable, which is a causeof an increase of cost.

Further, wirings are formed on both surface and back surface of thetape, and it is necessary that the wirings be electrically connectedwith each other through a conductor loaded into a through hole. Thus,also in point of structure, the tape cost becomes high.

SUMMARY OF THE INVENTION

It is an object of the present invention to provide a thin,surface-mounted type semiconductor device and a method of manufacturingthe same.

It is another object of the present invention to provide a non-leaded,thin, surface-mounted type semiconductor device wherein terminals arenot projected sideways of a sealing member and a method of manufacturingthe same.

It is a further object of the present invention to provide aninexpensive, thin and small-sized, non-leaded, resin-sealed typesemiconductor device and a method of manufacturing the same.

The above and other objects and novel features of the present inventionwill become apparent from the following description and the accompanyingdrawings.

Typical modes of the present invention as disclosed herein will beoutlined below.

(1) A flexible tape having plural terminals peelably through a firstadhesive in a product forming portion formed on a main surface of thetape is provided, a semiconductor element is fixed in the productforming portion to the main surface of the tape peelably through asecond adhesive, electrodes on the semiconductor element and theterminals are connected together through conductive wires, an insulatingresin layer is formed in an area including the semiconductor element andthe wires on the main surface of the tape to cover the semiconductorelement and the wires, and the tape on a back surface of the insulatingresin layer is peeled, allowing the terminals to be exposed to the backsurface of the insulating resin layer. Exposed surfaces of the terminalsare each formed by a gold layer. Each of the terminals comprises a mainmetal layer formed by copper foil and one or plural auxiliary metallayers formed on each of a main surface and a back surface of the mainmetal layer. The auxiliary metal layer(s) on the main surface of themain metal layer is formed using a material which affords a roughsurface, thereby roughening the main surface side of each terminal.

The above tape is not formed with through hole or wiring. Copper foil orthe like is affixed to the tape through a peelable adhesive and is thenetched into a predetermined pattern to form terminals.

(2) A flexible tape having plural terminals peelably through a firstadhesive in a product forming portion formed on a main surface of thetape is provided, a semiconductor element is fixed in the productforming portion to the main surface of the tape peelably through asecond adhesive, electrodes on the semiconductor element and theterminals are connected together through conductive wires, an insulatingresin layer is formed in an area including the semiconductor element andthe wires on the main surface of the tape to cover the semiconductorelement and the wires, and conductors are provided respectively onterminal surfaces exposed to the back surface of the insulating resinlayer to form salient electrodes. Each of the terminals comprises a mainmetal layer formed by copper foil and one or plural auxiliary metallayers formed on each of a main surface and a back surface of the mainmetal layer. The auxiliary metal layer(s) on the main surface of themain metal layer is formed using a material which affords a roughsurface, thereby roughening the main surface side of each terminal.

The above tape is not formed with through hole or wiring. Copper foil orthe like is affixed to the tape through a peelable adhesive and is thenetched into a predetermined pattern to form terminals.

(3) In the above construction (1) or (2), the product forming portion isprovided plurally in a matrix form on the tape, and after fixing thesemiconductor element and connection of wires in each of the productforming portions, the insulating resin layer is formed so as to coverthe product forming portions, thereafter the tape is peeled from theinsulating resin layer, and the insulating resin layer is cut alongboundaries between the product forming portions to fabricate pluralsemiconductor devices.

(4) In the above constructions (1) to (3), a single or pluralsemiconductor element fixing pieces are formed using the same materialas the material of the terminals at the time of forming the terminals onthe main surface of the tape, and the semiconductor element is fixedonto the semiconductor element fixing piece(s) through an adhesive.

(5) In the above constructions (1) to (3), the semiconductor element isbonded to the main surface of the tape using an insulating adhesivewhich is stronger in its bonding force for bonding to the semiconductorelement than in its bonding force for bonding to the tape, and the tapeis peeled from the insulating resin layer while allowing the adhesive toremain on the back surface of the semiconductor element.

(6) In the above constructions (1) to (5), the terminals are arranged ina matrix form.

(7) In the above constructions (1) to (6), the terminals are positionedinside outer periphery edges of the insulating resin layer.

According to the above means (1), (a) the semiconductor element andterminals are positioned on the main surface of the tape, and after thewire bonding and the formation of the insulating resin layer, the tapeis peeled from the insulating resin layer to fabricate a semiconductordevice. Thus, it is possible to fabricate a thin semiconductor device.

(b) Since the surfaces of the terminals are rough surfaces, theiradherence to the resin which forms the insulating resin layer is highand hence the sealing performance of the insulating resin layer isimproved. That is, there is no fear of falling-off of the terminals fromthe insulating resin layer.

(c) In the present invention, a semiconductor device is manufacturedusing a tape with terminals arranged on its main surface. This tape isnot the conventional expensive tape having wiring patterns, but is atape not formed with through hole or wiring. Copper foil or the like isaffixed to the tape through a peelable adhesive and is then etched intoa predetermined pattern to form terminals. Therefore, it is possible toattain the reduction of the semiconductor device manufacturing cost.

According to the above means (2), (a) the semiconductor element andterminals are positioned on the main surface of the tape, and after thewire bonding and the formation of the insulating resin layer, the tapeis peeled from the insulating resin layer and then salient electrodesare formed on exposed terminal surfaces to fabricate a semiconductordevice. Thus, it is possible to fabricate a thin semiconductor devicehaving salient electrodes.

(b) Since the surfaces of the terminals are rough surfaces, theiradherence to the resin which forms the insulating resin layer is highand therefore the sealing performance of the insulating resin layer isimproved. That is, there is no fear of falling-off of the terminals fromthe insulating resin layer.

(c) In the present invention, a semiconductor device is manufacturedusing a tape with terminals arranged on its main surface. This tape isnot the conventional expensive tape having wiring patterns, but is atape not formed with through hole or wiring. Copper foil or the like isaffixed to the tape through a peelable adhesive and is thereafter etchedinto a predetermined pattern to form terminals. Therefore, thesemiconductor device manufacturing cost can be reduced.

(d) Conductors are provided on terminal surfaces exposed to the backsurface of the insulating resin layer to form salient electrodes, thusaffording a so-called stand-off structure. Therefore, even if fine dustparticles are present on a packaging substrate at the time of packagingthe semiconductor device, it is possible to effect packaging without anytrouble.

According to the above means (3), since product forming portions areprovided in a matrix form on the tape and, after the insulating resinlayer is formed, the same layer is cut longitudinally and transverselyto fabricate semiconductor devices, it is possible to decrease the sizeof the sealing member formed by the insulating resin layer and a largenumber of small-sized and thin semiconductor devices can be manufacturedat a time.

According to the above means (4), it is possible to fabricate asemiconductor device with a semiconductor element fixed onto asemiconductor element fixing piece(s) formed using the same material asthe material of the terminals on the main surface of the tape. With thisconstruction, the back surface of the semiconductor element is protectedand therefore the semiconductor element can be made thinner, thuspermitting the reduction in thickness of the semiconductor device.

According to the above means (5), the back surface of the semiconductorelement is not directly exposed to the back surface of the sealingmember formed by the insulating resin layer, but the back surface of thesemiconductor element is covered with an insulating adhesive. Thus, anelectric insulation on the back side of the semiconductor element can beensured.

According to the above means (6), since terminals are arranged in amatrix form on the back surface of the sealing member formed by theinsulating resin layer, the semiconductor device fabricated has a largernumber of external electrode terminals (pins) in a smaller area. Thus,it is possible to attain the reduction in size and an increase in thenumber of pins of the semiconductor device.

According to the above means (7), the terminals are positioned insidethe outer periphery edges of the insulating resin layer, so even if thesemiconductor device is mounted in proximity of another electronic partsuch as another semiconductor device, no short-circuit occurs between itand the electronic part adjacent thereto and hence the packagingreliability is improved.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 a-d is a schematic sectional view showing manufacturing steps ina semiconductor device manufacturing method according to an embodiment(first embodiment) of the present invention;

FIG. 2 is a schematic plan view showing a semiconductor element andwires fixed to a terminals-arranged tape in the semiconductor devicemanufacturing method of the first embodiment;

FIG. 3 is a schematic plan view of another terminals-arranged tapeemployable in the semiconductor device manufacturing method of the firstembodiment;

FIG. 4 is a schematic perspective plan view showing a state of moldingperformed in accordance with a reel-to-reel method in the semiconductordevice manufacturing method of the first embodiment;

FIG. 5 is a schematic perspective view showing a reel which has taken upsemiconductor devices manufactured by the reel-to-reel method;

FIG. 6 is a schematic sectional view showing a terminals-arranged tapetaken up onto the reel and semiconductor devices formed on the tape;

FIG. 7 is a schematic sectional view of a semiconductor device accordingto another embodiment (second embodiment) of the present invention;

FIG. 8 is a schematic plan view of the semiconductor device of thesecond embodiment with part of a sealing member removed;

FIG. 9 is a schematic bottom view of the semiconductor device of thesecond embodiment;

FIG. 10 is a flowchart showing a method of manufacturing thesemiconductor device of the second embodiment;

FIG. 11 is a schematic plan view of a terminals-arranged tape used inthe method of manufacturing the semiconductor device of the secondembodiment;

FIG. 12 is a schematic sectional view thereof;

FIG. 13 a-f is a schematic sectional view showing an example (foilbonding) of a process for fabricating the terminals-arranged tape usedin the second embodiment;

FIG. 14 a-d is a schematic sectional view showing another example(printing) of a process for fabricating the terminals-arranged tape usedin the second embodiment;

FIG. 15 a-g is a schematic sectional view showing a further example(surface roughening) of a process for fabricating the terminals-arrangedtape use din the second embodiment;

FIG. 16 is a schematic plan view of the terminals-arranged tape afterfixing semiconductor elements to a main surface of the tape and aftercompletion of wire bonding in the method of manufacturing thesemiconductor device of the second embodiment;

FIG. 17 is a schematic sectional view showing a state of forming aninsulating resin layer by transfer molding in the method ofmanufacturing the semiconductor device of the second embodiment;

FIG. 18 a-b is a schematic diagram showing a state of a parting surfaceof an upper die of a molding die which bites into the tape in transfermolding;

FIG. 19 is a schematic plan view showing a molding area of theterminals-arranged tape;

FIG. 20 is a schematic plan view of the terminals-arranged tape with theinsulating resin layer formed thereon in the method of manufacturing thesemiconductor device of the second embodiment;

FIG. 21 is a schematic sectional view showing another example of formingthe insulating resin layer by transfer molding in the method ofmanufacturing the semiconductor device of the second embodiment;

FIG. 22 is a schematic sectional view showing in what state the tape isremoved from the insulating resin layer in the method of manufacturingthe semiconductor device of the second embodiment;

FIG. 23 is a schematic sectional view showing a state in which a film isformed by plating on each of surfaces of terminals exposed to a backsurface of the insulating resin layer in the method of manufacturing thesemiconductor device of the second embodiment;

FIG. 24 is a schematic sectional view showing a state in which theinsulating resin layer is diced into individual product forming portionsin the method of manufacturing the semiconductor device of the secondembodiment;

FIG. 25 is a schematic sectional view of a semiconductor deviceaccording to a further embodiment (third embodiment) of the presentinvention;

FIG. 26 is a schematic perspective plan view thereof;

FIG. 27 is a schematic bottom view thereof;

FIG. 28 is a schematic sectional view of a semiconductor deviceaccording to a still further embodiment (fourth embodiment) of thepresent invention;

FIG. 29 is a schematic bottom view thereof;

FIG. 30 a-c is a schematic sectional view showing examples of terminalsin the semiconductor device of the fourth embodiment;

FIG. 31 a-f is a schematic sectional view showing manufacturing steps ina method of manufacturing the semiconductor device of the fourthembodiment;

FIG. 32 is a schematic sectional view of a semiconductor device havingcircular terminals and manufactured by the method of manufacturing thesemiconductor device of the fourth embodiment;

FIG. 33 is a schematic perspective plan view thereof;

FIG. 34 is a schematic bottom view thereof;

FIG. 35 is a schematic sectional view of a semiconductor deviceaccording to a still further embodiment (fifth embodiment) of thepresent invention;

FIG. 36 a-e is a schematic sectional view showing manufacturing steps ina method of manufacturing the semiconductor device of the fifthembodiment;

FIG. 37 a-f is a schematic sectional view of manufacturing steps,showing an example of fabricating a terminals-arranged tape used in themethod of manufacturing the semiconductor device of the fifthembodiment;

FIG. 38 is a schematic sectional view of a semiconductor deviceaccording to a still further embodiment (sixth embodiment) of thepresent invention;

FIG. 39 a-d is a schematic sectional view showing manufacturing steps ina method of manufacturing the semiconductor device of the sixthembodiment;

FIG. 40 a-f is a schematic sectional view showing manufacturing steps ina method of manufacturing a semiconductor device according to a stillfurther embodiment (seventh embodiment) of the present invention;

FIG. 41 is a schematic sectional view of a semiconductor deviceaccording to a still further embodiment (eighth embodiment) of thepresent invention;

FIG. 42 is a schematic plan view of a terminals-arranged tape after chipbonding and wire bonding in a method of manufacturing the semiconductordevice of the eighth embodiment;

FIG. 43 is a schematic sectional view of the terminals-arranged tapewith an insulating resin layer formed thereon in the method ofmanufacturing the semiconductor device of the eighth embodiment;

FIG. 44 a-b is a schematic sectional view of semiconductor devicesmanufactured by using other terminals-arranged tapes in the method ofmanufacturing the semiconductor device of the eighth embodiment;

FIG. 45 is a schematic plan view showing a manufacturing example using aterminals-arranged tape having wiring distribution terminals in themethod of manufacturing the semiconductor device of the eighthembodiment;

FIG. 46 is a schematic plan view showing an example of manufacturingsemiconductor devices in a row on a terminals-arranged tape in themethod of manufacturing the semiconductor device of the eighthembodiment;

FIG. 47 is a schematic sectional view of a semiconductor deviceaccording to a still further embodiment (ninth embodiment) of thepresent invention;

FIG. 48 is a schematic plan view of a terminals-arranged tape after chipbonding and wire bonding in a method of manufacturing the semiconductordevice of the ninth embodiment;

FIG. 49 is a schematic sectional view of the terminals-arranged tapewith an insulating resin layer formed thereon in the method ofmanufacturing the semiconductor device of the ninth embodiment;

FIG. 50 a-b is a schematic sectional view of semiconductor devicesmanufactured by using other terminals-arranged tapes in the method ofmanufacturing the semiconductor device of the ninth embodiment; and

FIG. 51 is a schematic plan view showing an example of manufacturingsemiconductor devices in a row on a terminals-arranged tape in themethod of manufacturing the semiconductor device of the ninthembodiment.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Embodiments of the present invention will be described in detailhereinunder with reference to the accompanying drawings. In all of thedrawings for illustrating the embodiments, portions having the samefunctions are identified by the same reference numerals, and repeatedexplanations thereof will be omitted.

First Embodiment

FIGS. 1 to 6 illustrate a method of manufacturing a non-leaded,resin-sealed type semiconductor device according to an embodiment (firstembodiment) of the present invention. In this first embodiment, such asemiconductor device as shown in FIG. 1( d) is fabricated through suchsteps as shown in FIGS. 1( a) to 1(d).

First, as shown in FIG. 1( a), a flexible tape 1 is provided. Pluralterminals 2 are arranged peelably in a predetermined area, i.e., aproduct forming portion 10, on a main surface of the tape 1. The productforming area 10 is an area in which a semiconductor device is formed andwhich is quadrangular in shape not only in this embodiment but also insubsequent embodiments.

As shown in FIG. 2, the terminals 2 are arranged in the shape of aquadrangular frame and are arranged at equal intervals in two rows alongthe four sides of the quadrangle. A quadrangular tape surface locatedinside the frame serves as a semiconductor element fixing portion 3 forfixing thereto of a semiconductor element. Thus, the terminals 2 arearranged in a matrix form.

It is necessary that the tape 1 be formed by a heat-resistant insulatingresin film such as polyimide resin which does not undergo deformation ordamage even against heat in each of semiconductor device manufacturingsteps. From the standpoint of reducing the cost of the resultingsemiconductor device, it is necessary to select a less expensive resinfilm such as a film of EVA (ethylene-vinyl acetate copolymer) resin orPO (polyolefin) resin. In this first embodiment there is used, forexample, a film of PMPP (methacrylate resin). The tape 1 is as thin as100 μm or so. The same tape will be used also in the embodiments whichfollow.

The terminals 2 are formed peelably on the main surface of the tape 1.The terminals 2 are formed by (1) affixing a metal foil to the mainsurface of the tape 1 through an adhesive and thereafter etching themetal foil selectively, (2) affixing a metal foil to the main surface ofthe tape 1 by utilizing the adhesiveness of the tape and thereafteretching the metal foil selectively, (3) printing a conductive pasteselectively onto the main surface of the tape 1 and then curing thepaste, or (4) plating the main surface of the tape 1 with metal and thenetching the plating film selectively. Taking connection of wires intoaccount, a plating film or the like is formed on the main surface ofeach terminal. The terminals, no matter by which of the methods they maybe formed, they are in a bonded state peelable from the tape 1. In thisembodiment, such an adhesive is designated a first adhesive.

In this first embodiment and subsequent embodiments, reference will bemade to an example of using copper foil, copper paste, or copper platingfilm as a conductor. In the case where a conductor, i.e., a main metallayer, is copper, there may occur a defective connection, depending onthe material of wires connected. Therefore, it is necessary that anothermetal layer be formed on the surface of the main metal layer by platingor printing. For example, when the main metal layer is formed of copperand gold wires are connected thereto, such auxiliary metal layers as Niplating film and Au plating film are superimposed in this order on thesurface (main surface) of the main metal layer and gold wires areconnected onto the gold plating film. There may also be adopted a methodwherein copper wires are directly connected to copper terminals 2 in aninert atmosphere. In the case where the main metal layer is formed ofaluminum, gold wires can be connected thereto.

In the case where the surface of the main metal layer is plated withdifferent metals in a successively superimposed manner, if a Pd platingfilm as a plating film affording a rough surface is used as anintermediate layer, then when an insulating resin layer to be describedlater is formed on the main surface of the tape 1, the terminals 2 donot fall off from the insulating resin layer, i.e., a sealing member,because the adhesion between the terminals 2 and the resin which formsthe insulating resin layer becomes stronger in the presence of the roughsurface. For example, if the main metal layer is a copper layer, platingfilms are formed successively using Ni, Pd and Au. The surface of the Pdplating film becomes a rough surface. Therefore, the surface of the Auplating film formed on the Pd plating film also becomes rough andeventually main surfaces of the terminals 2 also become rough.

Next, as shown in FIGS. 1( a) and 2, a semiconductor element 4 ofsilicon is fixed to the semiconductor element fixing portion 3 with useof an adhesive (second adhesive) (not shown). This adhesive has such adegree of adhesiveness as permits the semiconductor element 4 to beeasily peeled later. The adhesiveness of the tape may be utilized forbonding the semiconductor element 4. The semiconductor element 4 isformed with a predetermined circuit and electrodes (not shown) areformed on a main surface (upper surface) of the semiconductor element 4so as to run along the sides of the main surface. The thickness of thesemiconductor element 4 is set at about 200 to 400 μm, although it isnot particularly limited.

Next, as shown in FIGS. 1( a) and 2, electrodes on the semiconductorelement 4 and the terminals 2 arranged around the semiconductor element4 are electrically connected with each other through conductive wires 5,e.g., Au wires.

Then, as shown in FIG. 1( b), an insulating resin layer 6 is formed onthe main surface of the tape 1 so as to cover the semiconductor element4 and the wires 5. For example, the insulating resin layer 6 is formedby the transfer molding method so as to cover the product formingportion 10. The insulating resin layer 6 is formed at a thickness of notlarger than 0.5 mm using, for example, an insulating epoxy resin. Theinsulating resin layer 6 forms a sealing member and the terminals 2 arearranged inside the edges of the sealing member (insulating resin layer6). Thus, even the terminals 2 located at the outermost periphery arenot exposed to the edges of the sealing member. Therefore, even if thesemiconductor device indicated at 9 is mounted onto a packagingsubstrate in proximity to another electronic part such as anothersemiconductor device, a short-circuit does not occur between it and theelectronic part adjacent thereto and hence the packaging reliabilitybecomes higher.

Next, the tape 1 is peeled from back surfaces of the insulating resinlayer 6, the semiconductor element 4 and the terminals 2 to form thesemiconductor device 9 in which the back surfaces of the semiconductorelement 4 and the terminals 2 are exposed to the back surface of theinsulating resin layer 6. In this first embodiment, when the tape 1 ispeeled, the first adhesive for the terminals 2 and the second adhesivefor the semiconductor element 4 are also removed in an adhered state tothe tape 1. The first and second adhesives are selected so as not tocause peeling of the semiconductor element 4 and the terminals 2 fromthe insulating resin layer 6.

Also in this step (step: S) the semiconductor device 9 can be mountedonto a predetermined packaging substrate with use of the terminals 2.That is, according to the construction of the semiconductor device 9,the terminals 2 can be allowed to function directly as externalelectrode terminals.

However, in this first embodiment, as shown in FIG. 1( d), salientelectrodes 7 are formed as external electrode terminals on the backsurfaces of the terminals 2 by the following step.

After peeling the tape 1, a predetermined plating film is formed on theback surfaces of the terminals 2 exposed to the back surface of theinsulating resin layer 6 and thereafter ball electrodes are attached tothe plating film to form the salient electrodes 7. The main metal layeris a copper layer, so for example Ni plating film (auxiliary metallayer) is formed on the back surfaces of the terminals 2 and thereaftersolder ball electrodes (solder bump electrodes) made of PbSn solder areattached to the Ni plating film by the conventional ball electrodeforming method.

As a result, the external electrode terminals in the semiconductordevice 9 become electrodes projecting a predetermined height from theback surface of the insulating resin layer 6, thus affording a so-calledstand-off structure. According to this structure, even if dust particlesare present slightly on the surface of a packaging substrate such as amother board at the time of mounting the semiconductor device onto thepackaging substrate, the dust particles do not contact the back surfaceof the insulating resin layer 6 and thus the packaging operation can bedone positively.

Even without using ball electrodes, the salient electrodes 7 can also beformed by forming a plating film (auxiliary metal layer) thick on theback surfaces of the electrodes 2 or by printing and curing a conductorpaste (auxiliary metal layer) thick on the back surfaces of theterminals, whereby a stand-off structure can be obtained. Even in thestand-off structure wherein external electrode terminals project fromthe back surface of the insulating resin layer 6, the height of thesemiconductor device according to this embodiment can be kept to a valueof not larger than 0.5 mm.

Although the tape 1 having terminals 2 arranged in a frame shape withinthe product forming portion 10 is used in this first embodiment, asshown in FIG. 3( a), the semiconductor device can also be fabricatedusing a tape 1 of the type wherein terminals 2 are arranged in matrixform within the product forming portion 10 and plural terminals 2located centrally are used as semiconductor element fixing pieces(obliquely lined terminals 2) for fixing thereto of the semiconductorelement 4. Since the thickness of each terminals 2 is about 20 to 30 μm,the second adhesive may be used for connection of the semiconductorelement 4. Since the groove between adjacent terminals 2 is shallow, theamount of the adhesive used is small and thus does not lead to anincrease of cost.

As shown in FIG. 3( b), the semiconductor device can also be fabricatedby using a tape 1 with terminals 2 arranged in a frame shape within theproduct forming portion 10 and having a single semiconductor elementfixing piece 11 of about the same size as the semiconductor element 4.Thus, not only plural semiconductor element fixing pieces 11 but also asingle semiconductor element fixing piece 11 may be used. The shape ofthe semiconductor element fixing portion using the semiconductor elementfixing piece(s) 11 is not limited to the quadrangular shape, but may beany other shape.

Although in this first embodiment the tape is peeled from the insulatingresin layer, the tape with semiconductor elements 9 affixed thereto maybe wound round a reel 15 as in FIG. 5 and in this state the reel 15 maybe shipped. In this case, as the tape 1, there is used a band-like tapehaving on both sides thereof guide holes 16 a to 16 c to be used fortransfer or positioning of the tape, as shown in FIG. 4. Then, thoughnot shown, the tape 1 after unwound from an unwinding reel is subjectedto an assembling work and is then taken up onto a take-up reel.

Thus, each assembling work is performed in accordance with a so-calledreel-to-reel method to fabricate semiconductor devices 9 on the mainsurface of the tape 1, as shown FIG. 6.

FIG. 4 is a schematic perspective plan view showing a state in whichsemiconductor devices 9, or sealing members, have been formed by atransfer molding apparatus. Resin extruded from each of culls 17 in thetransfer molding apparatus is fed into a cavity 20 through a runner 18and a gate 19 and is then cured therein. In this way there are formedsuch semiconductor devices 9 (sealing members) as shown in FIGS. 4 and6. A portion indicated at E in FIG. 5 is shown as an enlarged sectionalview in FIG. 6. Electrodes 4 a formed on the semiconductor element 4 areclearly shown in FIG. 4.

In this case, it is preferable that Ni or Au layer is formed on thetape-bonded side of each of the terminals 2 formed on the tape 1. Thisis for improving the adhesiveness to the bonding material at the time ofpackaging each semiconductor device 9. As will be made clear inconnection with a tape forming method to be described in a subsequentembodiment, such Ni or Au layer can be formed easily at the time offorming the tape 1.

The semiconductor device manufacturing method using the reel-to-reelmethod is preferable because not only the workability is high and it ispossible to reduce the semiconductor device manufacturing cost but alsoautomatic packaging of the semiconductor device can be done also on thecustomer side.

A heat-resistant, ultraviolet curing type tape is used as the tape 1,terminals 2 are formed on a main surface of the tape, ultraviolet lightis radiated to the ultraviolet curing type tape before peeling the tapefrom the back surface of the insulating resin layer 6, allowing thebonded portion to cure and deteriorate in adhesiveness, and thereafterthe tape 1 is peeled from the back surface of the insulating resin layer6. Thus, the tape in question is such a transparent tape as permitsultraviolet light to reach the bonded portion even if the ultravioletlight is radiated from the back surface of the tape.

In the ball electrode forming method, if the timing is just afterpeeling the tape (or before formation of an oxide film on the surface ofthe main metal layer), it is possible to form ball electrodes withoutforming an auxiliary metal layer.

This first embodiment brings about the following effects.

(1) Since the semiconductor device 9 is manufactured by the steps ofpositioning the semiconductor element 4 and terminals 2 on the mainsurface side of the tape 1, mounting the wires 5, forming the insulatingresin layer 6, and subsequently peeling the tape 1 from the insulatingresin layer 6, it is possible to fabricate the semiconductor device 9which is thin.

(2) Since the surfaces of the terminals 2 are rough, the adhesivenessthereof to the resin which forms the insulating resin layer 6 is highand the sealing performance of the insulating resin layer 6 is improved.That is, the terminals 2 do not fall off from the insulating resin layer6 and thus the reliability is improved.

(3) In the present invention the semiconductor device 9 is manufacturedusing the tape 1 with terminals 2 arranged on the main surface of thetape, but the tape 1 is not the conventional expensive tape havingwiring patterns, but is not formed with through hole or wiring.Therefore, the manufacturing cost of the semiconductor device 9 can bereduced. If a less expensive tape is used as the tape 1, there can beattained a further reduction of the manufacturing cost. Further, sincecopper foil or the like is affixed to the tape through a peelableadhesive and is then etched into a predetermined pattern to formterminals, it is possible to attain the reduction of the semiconductordevice manufacturing cost.

(4) Since the semiconductor device 9 is manufactured by the steps ofpositioning the semiconductor element 4 and terminals 2 on the mainsurface of the tape 1, connecting the wires 5, forming the insulatingresin layer 6, subsequently peeling the tape 1 from the insulating resinlayer 6, and then forming salient electrodes 7 on exposed terminalsurfaces, it is possible to fabricate the semiconductor device 9 whichhas a stand-off structure of a high packaging performance.

(5) The semiconductor element 4 can be fixed onto the semiconductorelement fixing piece(s) 11 which is constituted by a single or pluralpieces. With a single semiconductor element fixing piece 11, it ispossible to improve the heat dissipating performance and protect theback surface of a chip; besides, since the chip back surface isprotected, the chip can be made thinner, thus permitting a furtherreduction of package thickness. With plural semiconductor element fixingpieces, not only is it possible to improve the heat dissipatingperformance and protect the chip back surface, but also thestandardization of tape can be attained because different sizes ofelements can be mounted with use of one tape pattern.

(6) Since terminals 2 are arranged in a matrix form on the back surfaceof the sealing member constituted by the insulating resin layer 6, thesemiconductor device 9 comes to have a larger number of externalelectrode terminals (pins) in a small area, whereby it is possible toattain a small-sized, multi-pin structure of the semiconductor device 9.

(7) Since the terminals 2 are positioned inside the outer peripheryedges of the insulating resin layer 6 (sealing member), even if thesemiconductor device is mounted in proximity to another electronic partsuch as another semiconductor device, a short-circuit does not occurbetween it and the electronic part adjacent thereto and hence thepackaging reliability is improved. In addition, since lands on thepackaging substrate side do not protrude (the amount of protrusion issmall) from the package profile, it is possible to use the substrateeffectively, that is, the substrate can be made small.

(8) If the semiconductor device 9 is manufactured by the reel-to-reelmethod, the workability is high and it is possible to reduce themanufacturing cost of the semiconductor device 9. On the customer side,by unwinding the tape 1 from the reel 15 and peeling and picking up eachsemiconductor device 9 from the tape 1, it is possible to attainautomatic packaging of the semiconductor device 9 and thus possible toimprove the packaging workability.

Second Embodiment

FIGS. 7 to 24 illustrate a semiconductor device and a method ofmanufacturing the same according to another embodiment (secondembodiment) of the present invention, of which FIGS. 7 to 9 are relatedto the semiconductor device, FIG. 10 is a flowchart showing thesemiconductor device manufacturing method, and FIGS. 11 to 24 arerelated to the semiconductor device manufacturing method.

According to this second embodiment, as a tape corresponding to the tapeused in the semiconductor device manufacturing method of the firstembodiment there is used a tape with product forming portions arrangedin a matrix form of plural rows. A plating film (auxiliary metal layer)is formed on back surfaces of a semiconductor element fixing portion andterminals which back surfaces are exposed to a back surface of aninsulating resin layer, to make the terminals into salient electrodes.

The tape used in this second embodiment, which tape is indicated at 1 a,comprises a frame portion 22 defining peripheral edges and a group ofproduct forming portions 10 located inside the frame portion 22, whenviewed in plan as in FIG. 11.

Each product forming portion 10 is a portion for fabricating onesemiconductor device 1, and as the tape 1 a there is used aterminals-arranged tape of any of the following types: (1) the type[shown in FIG. 1( a)] in which semiconductor elements are fixed directlyto the tape, (2) the type [shown in FIG. 3( a)] in which semiconductorelements are each fixed to plural semiconductor element fixing pieces,and (3) the type [shown in FIG. 3( b)] in which semiconductor elementsare each fixed to a single semiconductor element fixing piece.

In this second embodiment, reference will be made to an example ofmanufacturing the semiconductor device with use of a terminals-arrangedtape of the above type (3) shown in FIG. 3( b) in which eachsemiconductor element is fixed to a single semiconductor element fixingpiece.

The tape 1 a used in this second embodiment has a structure in which atotal of eight product forming portions 10 are arranged in a matrix form(2×4) within a quadrangular area inside the frame portion 22. Outsidethe product forming portions 10, terminals 2 are arranged in one row inthe shape of a frame, though this is not always necessary. In the tapeused actually in manufacturing the semiconductor device, a larger numberof product forming portions are orderly arranged longitudinally andtransversely.

The semiconductor device manufactured by the semiconductor devicemanufacturing method according to this second embodiment has such astructure as schematically shown in FIGS. 7 to 9. FIG. 7 is a sectionalview of the semiconductor device 9, FIG. 8 is a plan view of thesemiconductor device with part of an insulating resin layer 6 removed,and FIG. 9 is a bottom view of the semiconductor device.

The semiconductor device 9 of this second embodiment is square in shape.This is obtained by dicing the tape 1 a together with an insulatingresin layer formed on a main surface thereof by means of a dicing bladein a final semiconductor device manufacturing step. Peripheral faces ofthe semiconductor device 9 are flat faces because of being cut by thedicing blade.

Back surfaces of a semiconductor element fixing piece 11 and terminals 2are exposed to a back surface of an insulating resin layer 6. The backsurfaces of the semiconductor element fixing piece 11, terminals 2 andinsulating resin layer 6 are flush with one another. Within theinsulating resin layer 6, a semiconductor element 4 is fixed to a mainsurface of the semiconductor element fixing piece 11, and electrodes 4 aon the semiconductor element 4 and the terminals 2 are connectedtogether through wires 5.

A plating film 25 (auxiliary metal layer) is formed on the back surfacesof the terminals 2 and semiconductor element fixing piece 11, wherebythe terminals 2 become salient electrodes 7. That is, the externalelectrode terminals project from the back surface of the insulatingresin layer 6 by an amount corresponding to the thickness of the platingfilm 25, thus affording a stand-off structure. The thickness of theinsulating resin layer 6 and that of the plating film 25 are selected sothat the thickness of the semiconductor device 9 is not larger than 0.5mm.

Next, a description will be given about a method of manufacturing thesemiconductor device of this second embodiment. As shown in theflowchart of FIG. 10, the semiconductor device 9 is manufactured throughthe steps of providing a terminal-arranged tape (S101), chip bonding(S102), wire bonding (S103), forming an insulating resin layer (S104),removing the tape (S105), treating surfaces of the terminals (S106), anddicing into individual product forming portions (S107).

Reference will first be made to several examples of methods forfabricating the tape 1 a (terminals-arranged tape) having suchmatrix-like product forming portions 10 as shown in FIGS. 11 and 12which tape is used in this second embodiment.

Tape Fabrication Example 1

The method shown in FIGS. 13( a) to 13(f) is a method of formingterminals by utilizing an electroless plating method. As shown in FIG.13( a), after the tape 1 a is provided, a metal foil 2 a is bonded to amain surface of the tape 1 a through an adhesive (first adhesive) 26.For example, copper foil is used as the metal foil 2 a.

Next, as shown in FIG. 13( b), the tape 1 a with the metal foil 2 aaffixed thereto is sandwiched in between a lower die 27 a and an upperdie 27 b of a press and the metal foil 2 a is compression-bonded to thetape 1 a by thermocompression bonding.

Then, as shown in FIG. 13( c), a photoresist film 28 is formed on themetal foil 2 a selectively by a conventional photolithography technique.More specifically, the photoresist film 28 is not formed in the regionwhere the terminals 2 and the semiconductor element fixing piece 11 areto be formed, but is formed in the other region.

Next, as shown in FIG. 13( d), with the photoresist film 28 as a maskfor etching, the metal foil 2 a is etched to form the terminals 2 andthe semiconductor element fixing piece 11.

Then, as shown in FIG. 13( e), the photoresist film 28 is removed,allowing the terminals 2 and the semiconductor element fixing piece 11to be exposed.

Next, as shown in FIG. 13( f), by performing electroless plating twice,Ni plating film 25 a (auxiliary metal layer) and Au plating film 25 b(auxiliary metal layer) are formed in a successively superimposed manneronto the surface of the main metal layer with the terminals 2 and thesemiconductor element fixing piece 11 formed thereon.

Tape Fabrication Example 2

The method shown in FIGS. 14( a) to 14(d) is a method of fabricatingterminals, etc. by a screen printing method. As shown in FIG. 14( a),after the tape 1 a is provided, a metal mask 30 in a screen printer issuperimposed on the tape 1 a in a closely contacted state. Then, asshown in FIG. 14( b), printing is performed while a conductor paste 31fed onto the metal mask 30 is pushed against the metal mask 30 by movinga squeegee 32. Areas to be printed of the metal mask 30 are formed asthrough holes and therefore the conductor paste 31 is charged into thethrough holes by an amount corresponding to the thickness of the metalmask 30. The through holes are formed correspondingly to thesemiconductor element fixing piece 11 and the terminals 2.

A suitable thickness of the conductor paste 31 charged into the throughholes can be selected by suitably selecting the thickness of the metalmask 30.

Next, as shown in FIG. 14( c), the metal mask 30 is removed and theconductor paste 31 printed on the main surface of the tape 1 a issubjected to baking to form the semiconductor element fixing piece 11and the terminals 2.

Then, as shown in FIG. 14( d), by performing electroless plating twice,Ni plating 25 a (auxiliary metal layer) and Au plating film (auxiliarymetal layer) are formed in a successively superimposed manner onto thesurface of the main metal layer which the terminals 2 and thesemiconductor element forming piece 11 formed thereon.

Tape Fabrication Example 3

The method shown in FIGS. 15( a) to 15(g), as described earlier, is amethod of forming the tape 1 a in which main surfaces (surfaces) of theterminals 2 are roughened to enhance the adhesiveness thereof to theresin which forms the insulating resin layer 6. According to this methodof fabricating the tape 1 a, in the steps of FIGS. 13( a) to 13(f) inthe Tape Fabrication Example 1, a step of FIG. 15( c) is providedbetween the step of FIG. 13( b) and the step of FIG. 13( c). The step ofFIG. 15( c) involves subjecting a main surface (surface) of the metalfoil 2 a to electroless plating to form a rough plating film 25 g(auxiliary metal layer) having a roughened surface (rough surface). Forexample, Pd plating film or Cu plating film is formed as the roughplating film 25 g.

Subsequently, by repeating the steps of FIGS. 13( c) to 13(f) as stepsof FIGS. 15( d) to 15(g), it is possible to roughen the surfaces of theterminals 2 and the semiconductor element fixing piece 11. If a thickfilm is formed on the rough plating film 25 g, the surface is notroughened and therefore a thin film is formed on the rough plating film25 g to afford a roughened surface.

In this second embodiment, after the tape 1 a fabricated by any of theabove tape fabrication methods is provided, the semiconductor device ismanufactured. For example, the tape 1 a fabricated by the TapeFabrication Example 1 is used.

After the tape 1 a (terminals-arranged tape) fabricated by the TapeFabrication Example 1 is provided (S101), a semiconductor element 4 isfixed onto the semiconductor element fixing piece 11 in each productforming portion 10 (S102), as shown in FIG. 16. The semiconductorelement fixing piece 11 is slightly larger than the semiconductorelement 4, but in FIG. 16 the semiconductor element fixing piece 11 andthe semiconductor element 4 are shown in a state of respective profilelines being coincident with each other. This is also true in thesubsequent drawings.

Next, as shown in FIG. 16, electrodes 4 a on the semiconductor element 4and the terminals 2 are connected together through wires 5 (S103). Auwires are used in this wire bonding step.

Then, as shown in FIG. 17, the tape 1 a after chip bonding and wirebonding is clamped by both a lower die 35 a and an upper die 35 b of atransfer molding apparatus and one-side molding is carried out whileinjecting molten resin 6 a under pressure into a cavity 20 through gates19 to form an insulating resin layer 6 as shown in FIG. 20 (S104). Inthis transfer molding, a tip end of a peripheral-edge projecting portion35 c which forms the cavity 20 in the upper die presses down theterminals 2 formed on the main surface of the tape 1 a or presses downthe tape 1 a directly, as shown in FIGS. 18( a) and 18(b). But, in bothcases, the tape 1 a absorbs distortion and pressing force because it isformed of an elastic material. With deformation of the tape 1 a, theperipheral-edge projecting portion 35 c of the upper die 35 b is certainto contact the tape 1 a and the terminals 2, so that a leakage-freecavity 20 is formed.

FIG. 19 is a plan view showing schematically the cavity 20, gates 19 andair vents 21 with respect to the tape 1 a. As the tape 1 a is removedfrom the molding die, that is, in the state shown in FIG. 20, the resinwhich has entered the gates 19 and air vents 21 and cured also remainscontiguously to the insulating resin layer 6.

In this transfer molding, if there is used such a lower die 35 a asshown in FIG. 21, the insulating resin layer 6 can be formed at apredetermined constant thickness.

That is, in the illustrated example, vacuum suction holes 35 f areformed in the lower die 35 a and vacuum suction is performed through thevacuum suction holes 35 f, bringing a back surface of the tape 1 a intoclose contact with a parting surface of the lower die 35 a to effectproper molding.

If this method involving vacuum suction of the back surface of the tape1 a to support the tape in a flat and immovable state is applied to thechip bonding and wire bonding which have already been described, thechip bonding and wire bonding can be done positively with a highaccuracy.

Next, as shown in FIG. 22, the tape 1 a is removed (S105). That is, thetape 1 a is peeled from the back surface of the insulating resin layer6.

Then, as shown in FIG. 23, the terminals 2 exposed to a back surface ofthe insulating resin layer 6 are subjected to surface treatment (S106).The surface treatment for the terminals is an auxiliary metal layerforming treatment which is carried out by an electroless plating methodor by printing of a conductor paste. More specifically, a plating film25 is formed on back surfaces of the terminals 2 by electroless plating.Because of electroless plating, the plating film 25 is formed also on aback surface of the semiconductor element fixing piece 11 unless thereis made masking.

Since the terminals 2 are formed of copper as the main metal layer, theplating film 25 is formed by forming Ni plating film (auxiliary metallayer) as a base layer and Au plating film (auxiliary metal layer) as asurface layer.

As a result, the adhesiveness to the bonding material used in packagingsuch as PbSn solder is improved. Further, as a result of formation ofthe plating film 25, the terminals 2 become salient electrodes 7. Thesalient electrodes 7 as external electrode terminals afford a stand-offstructure.

According to the printing method, a conductor layer can be formed ononly the back surfaces of the terminals 2. In the printing method, afterprinting of a conductor paste, baking is performed to evaporate avolatile component, allowing the conductor to cure to form a conductorlayer (auxiliary metal layer). This conductor layer becomes the salientelectrodes 7.

Next, as shown in FIG. 24, a support member (adhesive tape) 39 affixedto a support frame (not shown) is affixed to a main surface of theinsulating resin layer 6 and the insulating resin layer 6 is cut fromits back surface side up to an intermediate depth of the adhesive tape39 along boundaries of the product forming portions by means of a dicingblade 40 to dice the insulating resin layer into individual productforming portions, thereby affording semiconductor devices 9 (S107).

The thus-separated semiconductor devices 9 are in an affixed state tothe adhesive tape 39. By subsequently removing (peeling) eachsemiconductor device 9 from the adhesive tape 39, there are obtainedplural such semiconductor devices 9 as shown in FIGS. 7 to 9.

Peripheral faces of the insulating resin layer 6 (sealing member) thuscut in a square shape in each semiconductor device 9 are flat facesbecause of dicing of the insulating resin layer 6 by the dicing blade.

According to this second embodiment, not only there are obtained some ofthe effects of the first embodiment, but also since the semiconductordevices 9 are fabricated using the tape 1 a having product formingportions 10 in a matrix form and by cutting the insulating resin layer 6longitudinally and transversely, it is possible to minimize the width ofthe insulating resin layer 6 in the semiconductor device 9 and hencepossible to attain the reduction in size of the semiconductor device 9.Moreover, since the tape 1 a having product forming portions 10 in amatrix form is used and there is adopted a block molding method andsince the insulating resin layer 6 is diced longitudinally andtransversely by the dicing blade, a large number of semiconductordevices 9 can be manufactured at a time and the manufacturing cost ofthe non-leaded type semiconductor devices 9 can be reduced. Further, incutting the block-molded product, if marks are put on the transparentmolding resin or on the frame (tape), the cutting work can be effectedwithout peeling the tape 1 a (without re-affixing of the tape 39). As aresult, it is possible to attain the simplification of the process andthe reduction of the manufacturing cost, whereby it is possible toattain the reduction of cost of each product.

According to this second embodiment, a large number of thin andsmall-sized, non-leaded semiconductor devices 9 can be manufactured at atime by using a thin tape 1 a and forming the insulating resin layer 6thin.

At the time of forming the resin layer by transfer molding in thissecond embodiment, if there is adopted the method wherein the tape 1 ais brought into close contact with the resting surface (parting surface)of the lower die 35 a by vacuum suction, the insulating resin layer 6can be formed positively with a high accuracy. Thus, it is possible tomanufacture non-leaded semiconductor devices 9 of a good quality.

Third Embodiment

FIGS. 25 to 27 are related to a semiconductor device according to afurther embodiment (third embodiment) of the present invention. Thesemiconductor device of this third embodiment is fabricated by using atape having product forming portions arranged in a matrix form, withterminals being arranged in a matrix form in each of the product formingportions.

FIG. 25 is a schematic sectional view of the semiconductor device,indicated at 9, according to this third embodiment, FIG. 26 is aschematic perspective plan view of the semiconductor device, and FIG. 27is a schematic bottom view thereof. In the semiconductor device 9 ofthis third embodiment, as shown in these figures, terminals 2 arearranged in a matrix form on a back surface of a quadrangular insulatingresin layer 6. Outer edges of the terminals 2 located on the outermostside are also positioned inside the edges of the insulating resin layer6.

A semiconductor element 4 is fixed onto plural terminals 2. That is,this third embodiment is characteristic in that plural semiconductorelement fixing pieces 11 are used to fix the semiconductor element 4. Anadhesive (second adhesive) 29 for fixing the semiconductor element 4gets into grooves formed between adjacent terminals in the area wherethe semiconductor element 4 is fixed. Since the thickness of eachterminal 2 is about 20 to 30 μm, the depth of each groove is also about20 to 30 μm, and the amount of the adhesive 29 is not so large as causesa great increase in the cost of the semiconductor device 9.

Also in the semiconductor device 9 of this third embodiment, a platingfilm 25 is formed on the terminals 2 whose back surfaces are exposed tothe back surfaces of the insulating resin layer 6 to form salientelectrodes 7, thereby affording a stand-off structure.

According to the structure of the semiconductor device 9 of this thirdembodiment, the semiconductor element 4 is mounted on plural terminals2. That is, since there is used a tape having product forming portionsarranged in a matrix form, package bodies of different sizes can bemanufactured using the same molding die in molding, whereby it ispossible to diminish the investment in manufacturing equipment.

Fourth Embodiment

FIGS. 28 to 34 are related to a semiconductor device according to astill further embodiment (fourth embodiment) of the present invention,of which FIGS. 28 to 30 illustrate the structure of the semiconductordevice and FIG. 31 illustrates a method of manufacturing thesemiconductor device.

In the semiconductor device 9 of this fourth embodiment, as shown inFIGS. 28 and 29, back surfaces of an insulating resin layer 6, asemiconductor element 4 and terminals 2 are flush with each other, andthe back surfaces of the semiconductor element 4 and terminals 2 areexposed from the insulating resin layer 6.

In this fourth embodiment, the structure of the terminals 2 is differentfrom those in the previous embodiments. FIGS. 30( a) to 30(c) areschematic sectional views showing examples of terminals. As shown inFIGS. 30( a) to 30(c), each terminal 2 comprises a main metal layer 42and one or plural auxiliary metal layers 43 formed on each of a surfaceand a back surface of the main metal layer 42.

FIG. 30( a) shows a first example of a terminal. This terminal 2comprises a main metal layer 42 formed of Ni and an auxiliary metallayer 43 formed of Au. This structure is obtained, for example, byplating Ni foil to form Au plating film on each of a surface and a backsurface of the Ni foil, then affixing the Ni foil to a tape 1 a andetching the Ni foil into a predetermined pattern. By forming Au layersrespectively on a main surface and a back surface of the terminal 2, Auwire can be connected to the main surface of the terminal 2, and abonding material for packaging such as solder can be bonded to the backsurface of the terminal 2.

FIG. 30( b) shows a second example of a terminal. This terminal 2comprises a main metal layer 42 formed of Cu and two auxiliary metallayers 43 formed on each of a surface and a back surface of the mainmetal layer. Of the two layers, the lower layer is formed of Ni and theupper layer (surface layer) is formed of Au. The Ni layer is not onlysuperior in its adhesiveness to CU but also prevents the diffusion of Auand Cu. The terminal 2 of this second example is obtained by platingcopper foil twice to form Ni plating film and Au plating film on each ofa surface and a back surface of the Cu foil, then affixing the copperfoil to the tape 1 a and etching the Ni foil into a predeterminedpattern.

FIG. 30( c) shows a third example of a terminal. This terminal 2comprises a main metal layer 42 formed of Cu and three auxiliary layers43 formed on each of a surface and a back surface of the main metallayer. Of the three layers, the lower, intermediate and upper (surface)layers are formed of Ni, Pd and Au, respectively. The terminal 2 of thisthird example is obtained by plating copper foil three times to form Ni,Pd and Au plating films on each of a surface and a back surface of thecopper foil, then affixing the copper foil to the tape 1 a and etchingthe Ni foil into a predetermined pattern.

Since the surface of the Pd layer becomes rough, the surface of the Aulayer also becomes rough unless the Au layer is formed thicker thannecessary, with the result that the surface and the back surface of theterminal 2 also become rough. By making the main surface of the terminal2 rough, the area of adhesion to the resin which constitutes theinsulating resin layer 6 increases and the bonding force increasesbecause the resin bites into the rough surface, so that the terminal 2becomes difficult to fall off from the insulating resin layer 6 and thereliability of the semiconductor device becomes higher.

In all of the terminals fabricated in the above examples, the connectionof Au wire is good and the adhesiveness of the bonding material inpackaging is improved.

Next, a method of manufacturing the semiconductor device of this fourthembodiment will be described with reference to FIGS. 31( a) to 31(f).First, as shown in FIG. 31( a), a tape 1 a is provided. On the tape 1 athere are formed product forming portions 10 in a matrix shape. In eachof the product forming portions 10, terminals 2 are arranged in two rowsin the shape of a frame. A quadrangular portion inside the frame servesas a semiconductor element fixing portion 3.

Then, a semiconductor element 4 is fixed onto the semiconductor elementfixing portion 3 in each of the product forming portions 10 with use ofan adhesive 26 [see FIG. 31( a)].

Next, in each product forming portion 10, electrodes (not shown) on thesemiconductor element 4 and the terminals 2 are connected togetherthrough wires 5 (Au wires) [see FIG. 31( b)].

Then, as shown in FIG. 31( c), an insulating resin layer 6 is formed ona main surface side of the tape 1 a by one-side molding in transfermolding to cover the semiconductor element 4 and wires 5.

Next, as shown in FIG. 31( d), the tape 1 a is peeled from a backsurface of the insulating resin layer 6. At this time, an adhesive 26 onthe main surface of the tape 1 a is peeled from the back surface of theinsulating resin layer 6, so that back surfaces of the terminals 2 andthe semiconductor element 4 are exposed to the back surface of theinsulating resin layer 6. The back surfaces of the insulating resinlayer 6, the semiconductor element 4 and the terminals 2 come to bepositioned on the same plane, and the back surfaces of the semiconductorelement 4 and the terminals 2 are exposed from the insulating resinlayer 6.

Then, as shown in FIG. 31( e), a support member (adhesive tape) 39affixed to a support frame (not shown) is affixed to a main surface ofthe insulating resin layer 6 and the product forming portions are cutfrom the back surface of the insulating resin layer 6 up to anintermediate depth of the adhesive tape 39 along boundaries of theproduct forming portions by means of a dicing blade 40 to divide theproduct forming portions into individual product forming portions,thereby affording semiconductor devices 9. The semiconductor devices 9thus separated are in an affixed state to the adhesive tape 39. Byremoving (peeling) the individual semiconductor devices 9 from theadhesive tape 39, there are fabricated plural such semiconductor devices9 as shown in FIG. 31( f).

FIGS. 32 to 34 are related to a semiconductor device manufactured by thesemiconductor device manufacturing method according to claim 4, of whichFIG. 32 is a schematic perspective plan view of the semiconductordevice, FIG. 33 is a schematic perspective plan view thereof, and FIG.34 is a schematic bottom view thereof. Even if the shape of eachterminal 2 is any other shape than the quadrangular shape, some of theeffects described in the previous embodiments will be obtained.

According to this fourth embodiment it is possible to fabricate asurface mounted type non-leaded semiconductor device.

Fifth Embodiment

FIGS. 35 to 37 are related to a semiconductor device according to astill further embodiment (fifth embodiment) of the present invention, ofwhich FIG. 35 is a schematic sectional view of the semiconductor deviceand FIG. 36 is a schematic sectional view showing manufacturing steps ina method of manufacturing the semiconductor device according to thefifth embodiment.

In the semiconductor device 9 of this fifth embodiment, as shown in FIG.35, a semiconductor element 4 sealed within an insulating resin layer 6is supported by a single semiconductor element fixing piece 11, and aback surface of the semiconductor element fixing piece 11 and that ofthe insulating resin layer 6 are positioned on the same plane. Backsurfaces of terminals 2 are also flush with the back surface of theinsulating resin layer 6. Though not shown in the drawing, the terminals2 and the semiconductor element fixing piece 11 each comprise a mainmetal layer and one or plural auxiliary metal layers formed on each of asurface and a back surface thereof, with the auxiliary metal layerpositioned as a surface layer being Au layer.

The semiconductor device 9 of this fifth embodiment is manufactured inaccordance with the manufacturing steps shown in the sectional views ofFIGS. 36( a) to 36(e).

First, such a tape 1 a as shown in FIG. 36( a) is provided. The tape 1 ahas product forming portions 10 arranged in a matrix form. In each ofthe product forming portions 10, terminals 2 are arranged in two rows inthe shape of a frame. A semiconductor element fixing piece 11 of aquadrangular shape is provided inside the frame. The terminals 2 and thesemiconductor element fixing piece 11 are bonded together through anadhesive 26.

As the tape 1 a there may be used the tape which has been used in theprevious fourth embodiment. Now, with reference to FIGS. 37( a) to37(f), a description will be given of another tape fabrication example.

After the tape 1 a is provided as shown in FIG. 37( a), a metal film 45is formed on a main surface of the tape la by, for example, vapordeposition or sputtering. The metal of the metal film 45 is notspecially limited insofar as it can be formed by vapor deposition orsputtering. For example, the metal film 45 is formed using any of Ag,Au, Al, Cu, Ni, Pd, and Cr.

Next, as shown in FIG. 37( c) one or plural auxiliary metal layers 46are formed on a main surface of the metal film 45 by an electrolyticplating method. For example, Cu, Ni, and Au are plated in this orderonto the main surface of the metal film 45.

Then, as shown in FIG. 37( d), a photoresist film 47 is formed in apredetermined pattern on the auxiliary metal layer 46 positioned as asurface layer. Thereafter, as shown in FIG. 37( e), using thephotoresist film 47 as a mask for etching, the auxiliary metal layers 46and the metal film 45 are etched to form terminals 2 and a semiconductorelement fixing piece 11. Further, by removing the photoresist film 47,the tape 1 a having the semiconductor element fixing piece 11 and theterminals 2 on the main surface thereof is fabricated as shown in FIG.37( f).

In the fifth embodiment, such a tape 1 a or the tape 1 a used in theprevious fourth embodiment is used in manufacturing the semiconductordevice.

After the tape 1 a is provided as shown in FIG. 36( a), a semiconductorelement 4 is fixed onto the semiconductor element fixing piece 11through an adhesive (second adhesive) 29, as shown in FIG. 36( b).

Next, electrodes (not shown) on the semiconductor element 4 and theterminals 2 are connected together through wires 5 (Au wires), as shownin FIG. 36( c).

Then, as shown in FIG. 36( d), an insulating resin layer 6 is formed onthe main surface of the tape 1 a by one-side molding in transfer moldingto cover the semiconductor element 4 and the wires 5.

Next, as shown in FIG. 36( e), the tape 1 a is peeled from a backsurface of the insulating resin layer 6. At this time, the adhesive 26on the main surface of the tape 1 a is peeled from the back surface ofthe insulating resin layer 6, back surfaces of the terminals 2 and thesemiconductor element 4 are exposed to the back surface of theinsulating resin layer 6. The back surfaces of the insulating resinlayer 6, the semiconductor element 4 and the terminals 2 come to bepositioned on the same plane, and the back surfaces of the semiconductorelement 4 and the terminals 2 are exposed from the insulating resinlayer 6.

Thereafter, the insulating resin layer 6 is cut into individual productforming portions in the same manner as in the fourth embodiment toafford individual semiconductor devices 9.

According to this fifth embodiment there accrues the effect that it ispossible to form wiring lines at a higher degree of freedom.

Sixth Embodiment

FIG. 38 is a schematic sectional view of a semiconductor deviceaccording to a still further embodiment (sixth embodiment) of thepresent invention and FIG. 39 is a schematic sectional view showingmanufacturing steps in a method of manufacturing the semiconductordevice.

An insulating adhesive 50 is allowed to remain on a back surface of asemiconductor element 4, thereby causing a silicon substrate of thesemiconductor element 4 to be independent electrically. That is,peripheral faces of the semiconductor element 4 and the adhesive 50 arecovered with an insulating resin (insulating resin layer 6), so that thesilicon substrate of the semiconductor element 4 assumes an electricallyindependent state.

The adhesive 50 used is an insulating adhesive which is weaker in itsadhesion to an adhesive (first adhesive) 26 f or bonding a tape 1 a andcopper foil than in its adhesion to the silicon substrate of thesemiconductor element 4. Therefore, when the tape 1 a is peeled from theinsulating resin layer 6, the adhesive 50 and the tape 1 a (or theadhesive (first adhesive) 26) are peeled from each other in such amanner that the adhesive 50 remains on a back surface of thesemiconductor element 4.

The adhesive 50 may be substituted by an adhesive tape both surfaces ofwhich are adhesive surfaces. The adhesive which forms the adhesivesurfaces is an insulating adhesive which is weaker in its adhesion tothe adhesive (first adhesive) 26 for bonding the tape 1 a and copperfoil than in its adhesion to the semiconductor element 4 and the siliconsubstrate. Therefore, when the tape 1 a is peeled from the insulatingresin layer 6, the adhesive 50 and the tape 1 a (or the adhesive (firstadhesive) 26) are peeled from each other while allowing the insulatingadhesive tape to remain on the back surface of the semiconductor element4.

In the semiconductor device 9 of this sixth embodiment, the back surfaceof the semiconductor element 4 is not exposed to the back surface of thesealing member formed by the insulating resin layer 6, but is coveredwith the insulating adhesive 50, so that it is possible to ensure anelectric insulation on the back side of the semiconductor element 4.

Next, the following description is provided about a method ofmanufacturing the semiconductor device 9 of this sixth embodiment. Thetape 1 a used in the fourth embodiment is used in this method.

As shown in FIG. 39( a), after the tape 1 a is provided, a semiconductorelement 4 is fixed through the insulating adhesive 50 to a semiconductorelement fixing portion 3 in each product forming portion 10.

Next, as shown in FIG. 39( b), electrodes (not shown) on thesemiconductor element 4 and terminals 2 are connected together throughwires 5 (Au wires).

Then, as shown in FIG. 39( c), an insulating resin layer 6 is formed ona main surface of the tape 1 a by one-side molding in transfer moldingto cover the semiconductor element 4 and the wires 5.

Next, as shown in FIG. 39( d), the tape 1 a is peeled from a backsurface of the insulating resin layer 6. The peeling is done along theboundary between the adhesive (first adhesive) 26 and the adhesive 50.The tape 1 a is peeled together with the adhesive 26. As a result of thetape 1 a and the adhesive 26 having been peeled, back surfaces of theterminals 2 and the semiconductor element 4 are exposed to the backsurface of the insulating resin layer 6. The back surfaces of theinsulating resin layer 6, the semiconductor element 4 and the terminals2 come to be exposed on the same plane, and the back surfaces of thesemiconductor element 4 and the terminals 2 are exposed from theinsulating resin layer 6. The exposed surfaces of the terminals 2 haveAu layer for satisfactory bonding to an adhesive at the time ofpackaging the semiconductor device.

Thereafter, the insulating resin layer 6 is divided into individualproduct forming portions in the same way as in the fourth embodiment tofabricate such plural semiconductor devices 9 as shown in FIG. 38.

Seventh Embodiment

FIG. 40 is a sectional view showing manufacturing steps in a method ofmanufacturing a semiconductor device according to a still furtherembodiment (seventh embodiment) of the present invention.

In this seventh embodiment, an insulating resin layer 6 is formed bypotting. Materials to be provided and other steps than the potting stepare the same as in the fourth embodiment. First, as shown in FIG. 40(a), a tape 1 a is provided. The tape 1 a has product forming portions 10formed in a matrix shape on a main surface of the tape.

Terminals 2 are bonded to the tape 1 a through an adhesive 26 andsurfaces thereof have Au layer.

Next, as shown in FIG. 40( a), a semiconductor element 4 is fixedthrough the adhesive 26 onto a semiconductor element fixing portion 3located inside framewise-arranged terminals 2 in each of the productforming portions 10.

Then, in each of the product forming portions 10, electrodes (not shown)on the semiconductor element and the terminals 2 are connected togetherthrough wires 5 (Au wires) [see FIG. 40( b)].

Next, as shown in FIG. 40( c), an insulating sealing resin 56 isdropwise added from a dispenser 55 to form an insulating resin layer 6on the main surface of the tape 1 a. The semiconductor element 4 and thewires 5 are covered with the insulating resin layer 6. The sealing resin56 has fluidity and therefore becomes high over the semiconductorelement 4 and low over the terminals 2. However, since the insulatingresin 56 possesses a predetermined fluidity, it surely covers thesemiconductor element 4 and the wires 5. After the dropwise addition ofthe sealing resin 56, the resin is cured to form a cured insulatingresin layer 6.

Then, as shown in FIG. 40( d), the tape 1 a is peeled from a backsurface of the insulating resin layer 6. At this time, the adhesive 26on the main surface of the tape 1 a is peeled from the back surface ofthe insulating resin layer 6, so that back surfaces of the terminals 2and the semiconductor element 4 are exposed to the back surface of theinsulating resin layer 6. The back surfaces of the insulating resinlayer 6, the semiconductor element 4 and the terminals 2 come to bepositioned on the same plane, and the back surfaces of the semiconductorelement 4 and the terminals 2 are exposed from the insulating resinlayer 6.

Next, as shown in FIG. 40( e), a support member (adhesive tape) 39affixed to a support frame (not shown) is affixed to a main surface ofthe insulating resin layer 6, and the insulating resin layer 6 is cutalong boundaries of the product forming portions into individual productforming portions by means of a dicing blade 40 to afford semiconductordevices 9. The thus-separated semiconductor devices 9 are in an affixedstate to the adhesive tape 39. By removing (peeling) the semiconductordevices 9 from the adhesive tape 39 there are obtained such pluralindividual semiconductor devices 9 as shown in FIG. 40( f).

According to this seventh embodiment, since the sealing member of resinis formed by potting, (1) it is not necessary to use a molding die, (2)the occurrence of a short-circuit caused by wire shift in molding can bediminished, (3) chip shrink becomes possible because of narrowing of thepad pitch with improvement of the wire short margin, and (4) a furtherreduction of package thickness can be attained.

Eighth Embodiment

FIGS. 41 to 46 are related to a semiconductor device according to astill further embodiment (eighth embodiment) of the present invention.This eighth embodiment relates to a structure wherein pluralsemiconductor elements are incorporated within the semiconductor device.

In the semiconductor device 9 of this eighth embodiment, as shown in aschematic sectional view of FIG. 41, semiconductor elements 4 aremounted on plural semiconductor element fixing pieces 11 at pluralpositions.

In a method of manufacturing the semiconductor device 8 according tothis eighth embodiment, there is used such a tape 1 a as shown in FIG.42. In FIG. 42, a total of four product forming portions are formedlongitudinally and transversely though not indicated by referencenumerals. Four types of semiconductor elements 4 are fixed topredetermined positions in each product forming portion, and electrodeson each semiconductor element 4 and terminals 2 are connected togetherthrough wires 5. In the same figure, reference numerals are affixed toonly one product forming portion, and a partial region surrounded with adot-dash line is a molding region 57 in transfer molding.

FIG. 43 is a schematic sectional view of the tape la which is aterminals-arranged tape with an insulating resin layer 6 formed thereonand which is used in this semiconductor device manufacturing method. Allthe semiconductor elements 4 and wires 5 are covered with the insulatingresin layer 6.

In steps which follow this molding step, the tape la having thus beensubjected to molding is peeled from the insulating resin layer 6 in thesame way as in the previous embodiments and thereafter the insulatingresin layer 6 is cut longitudinally and transversely into a plurality ofindividual semiconductor devices 9.

FIGS. 44( a) and 44(b) are schematic sectional views of semiconductordevices manufactured by using other terminals-arranged tapes. In thesemiconductor device 9 shown in FIG. 44( a), semiconductor elements 4are each mounted on a single semiconductor element fixing piece 11,while in the semiconductor device 9 shown in FIG. 44( b), semiconductorelements 4 are fixed onto a main surface of a tape 1 a. Thus, varioustapes are employable.

In the semiconductor device manufacturing method according to this eightembodiment, as shown in FIG. 45, if adjacent terminals are madeintegrally contiguous to each other to form a wiring distributionterminal 58, there accrues the effect that a distributive connection ofwires 5 becomes easier. Moreover, if there is adopted a structurewherein the semiconductor elements are fixed using an insulatingadhesive, the wiring distribution terminal 58 can be positioned belowthe semiconductor elements, whereby the degree of freedom in productdesign becomes higher.

Although in this embodiment reference has been made to the technique ofmanufacturing the semiconductor devices 9 with use of the tape 1 a onwhich product forming portions are arranged in a matrix form, productforming portions may be arranged in one row to manufacture thesemiconductor devices in one row on the tape 1 a, as shown in FIG. 46.

According to this eighth embodiment, by incorporating plural chips(semiconductor elements) in each semiconductor device 9, there can bemanufactured a thin and small-sized semiconductor device 9 in a lessexpensive manner.

Ninth Embodiment

FIGS. 47 to 51 are related to a semiconductor device according to astill further embodiment (ninth embodiment) of the present invention.Also in this ninth embodiment, as in the eighth embodiment, pluralsemiconductor elements are incorporated within a semiconductor device.Semiconductor elements are stacked on at least some semiconductorelements. In this ninth embodiment, all of semiconductor elements 4 usedare stacked in two stages.

In the semiconductor device 9 according to this ninth embodiment, asshown in a schematic sectional view of FIG. 47, on a semiconductorelement 4 fixed onto plural semiconductor element fixing pieces 11 thereis mounted another semiconductor element 4 of a smaller size. Electrodes(not shown) on the lower semiconductor element 4 are not covered withthe upper semiconductor element 4, but are exposed so as not to obstructwire bonding. Electrodes and terminals 2 on both lower and uppersemiconductor elements 4 are connected together through wires 5.

In a method of manufacturing the semiconductor device according to thisninth embodiment there is used such a tape 1 a as shown in FIG. 48. InFIG. 48, four product forming portions are formed longitudinally andtransversely though not indicated by reference numerals. In each productforming portion, semiconductor elements 4 are fixed in two stackedstages at predetermined positions, and electrodes and terminals 2 onboth upper and lower semiconductor elements are connected togetherthrough wires 5. In the same figure, reference numerals are affixed toonly one product forming portion, and a partial region surrounded with adot-dash line is a molding region 57 in transfer molding.

FIG. 49 is a schematic sectional view of the tape 1 a as aterminals-arranged tape formed with an insulating resin layer 6 in thesemiconductor device manufacturing method being considered. Thesemiconductor elements 4 stacked in two stages and the wires 5 arecovered with the insulating resin layer 6.

In steps which follow this molding step, the tape la having thus beensubjected to molding is peeled from the insulating resin layer 6 in thesame way as in the previous embodiments and thereafter the insulatingresin layer 6 is cut into a plurality of individual semiconductordevices 9.

FIGS. 50( a) and 50(b) are schematic sectional views of semiconductordevices manufactured by using other terminals-arranged tapes. In thesemiconductor device 9 shown in FIG. 50( a), a semiconductor element 4is mounted on a single semiconductor element fixing piece 11 and asemiconductor element 4 of a smaller size is fixed onto theunderlying-semiconductor element 4 so as not to cover the electrodesformed on the underlying semiconductor element 4. In the semiconductordevice 9 shown in FIG. 50( b), a semiconductor element 4 is fixed to amain surface of a tape 1 a and a semiconductor element 4 of a smallersize is fixed onto the underlying semiconductor element 4 so as not tocover the electrodes formed on the underlying semiconductor element 4.

It goes without saying that such wiring distribution terminals as in theeighth embodiment may be arranged to facilitate a distributiveconnection of wires, though not shown. The wiring distribution terminalsmay be adopted in all of the previous embodiments.

Although in this embodiment reference has been made to the technique ofmanufacturing the semiconductor devices 9 with use of the tape 1 a onwhich product forming portions are arranged in a matrix form, productforming portions may be arranged in one row to manufacture thesemiconductor devices in one row on the tape 1 a, as shown in FIG. 51.

According to this ninth embodiment, by stacking plural chips(semiconductor elements) in multiple stages within each semiconductordevice 9, there can be manufactured a thin and small-sized semiconductordevice 9 in a less expensive manner.

Although embodiments of the present invention have been described aboveconcretely, it goes without saying that the invention is not limited tothe above embodiments, but that various changes may be made within thescope not departing from the gist of the invention.

The following is a brief description of effects obtained by typicalmodes of the present invention as disclosed herein.

-   (1) It is possible to provide a thin, surface-mounted type    semiconductor device.-   (2) It is possible to provide a small-sized, surface-mounted type    semiconductor device.-   (3) It is possible to provide a thin, small-sized, less expensive,    surface-mounted type semiconductor device.-   (4) It is possible to provided a surface-mounted type semiconductor    device high in packaging reliability.

In the semiconductor device manufacturing method according to thepresent invention, as set forth above, a terminals-arranged tape isprovided, followed by fixing of chips and connection of wires, then themain surface of the tape, including the chips and the wires, is coveredwith an insulating resin, thereafter the tape is peeled, followed bycutting into individual semiconductor devices. This method is suitablefor the manufacture of a non-leaded semiconductor device and it ispossible to manufacture a thin and small-sized non-leaded semiconductordevice.

1. A method of manufacturing a semiconductor device, comprising thesteps of: (a) providing a tape having a main surface, a back surfaceopposed to the main surface, a product forming portion formed on themain surface, and a plurality of terminals formed in the product formingportion, said plurality of terminals arranged in a quadrangular framehaving an equal number of rows and columns; (b) fixing a semiconductorelement to the main surface of the tape; (c) electrically connecting aplurality of electrodes formed over the semiconductor element with theplurality of terminals through wires respectively; (d) sealing thesemiconductor element, the wires, the plurality of terminals and themain surface of the tape with a resin, and forming a sealing member; (e)clamping, during said sealing step of (d), the tape between an upper dieand a lower die, wherein the lower die includes a plurality of vacuumsuction holes; (f) after the step of (e), peeling the tape from thesealing member, and thereby exposing a part of each of the plurality ofterminals from the sealing member; and (g) forming a metal layer overthe exposed part of each of the plurality of terminals, wherein there isno exposure of the plurality of terminals and terminal leads at sideedges of the sealing member; and wherein the metal layer is formed by aprinting process.
 2. The method according to claim 1, wherein theplurality of terminals are formed by affixing a metal foil to the mainsurface of the tape and thereafter etching the metal foil selectively.3. The method according to claim 2, wherein the metal foil is affixed tothe main surface of the tape through a first adhesive.
 4. The methodaccording to claim 2, wherein the metal foil is compression-bonded tothe tape by thermocompression bonding.
 5. The method according to claim1, wherein a back surface of the semiconductor element is exposed fromthe sealing member.
 6. The method according to claim 1, wherein the tapehas a semiconductor element fixing piece, and the semiconductor elementis mounted over the semiconductor element fixing piece.
 7. The methodaccording to claim 1, wherein the plurality of terminals are fixed tothe tape through a first adhesive, and the semiconductor element isfixed to the tape through a second adhesive.
 8. The method according toclaim 2, wherein a Pd plating film is formed over each of the pluralityof terminals.
 9. The method according to claim 1, wherein the tape isformed by a resin film selected from polyimide resin,ethylene-vinylacetate copolymer resin, polyolefin resin and methacrylateresin.
 10. The method according to claim 1, wherein the steps (d) and(e) are carried out while the back surface of the tape is held by vacuumsuction.
 11. The method according to claim 1, wherein the number of rowsand the number of columns is two.
 12. A method of manufacturing asemiconductor device, comprising the steps of: (a) providing a tapehaving a main surface, a back surface opposed to the main surface, aproduct forming portion formed on the main surface; (b) forming aplurality of terminals in the product forming portion, said plurality ofterminals arranged in a quadrangular frame having an equal number ofrows and columns, by a screen printing method comprising (b1) placing amask on the main surface of the tape in contacting state; (b2) applyinga conductor paste onto the mask to print the plurality of terminals anda semiconductor fixing piece; (b3) removing the mask; and (b4) bakingthe printed conductor paste to form the plurality of terminals and thesemiconductor fixing piece; (c) fixing a semiconductor element to thesemiconductor fixing piece on the main surface of the tape; (d)electrically connecting a plurality of electrodes formed over thesemiconductor element with the plurality of terminals through wiresrespectively; (e) sealing the semiconductor element, the wires, theplurality of terminals and the main surface of the tape with a resin,and forming a sealing member; (f) after the step of (e), peeling thetape from the sealing member, and thereby exposing a part of each of theplurality of terminals from the sealing member; and (g) forming a metallayer over the exposed part of each of the plurality of terminals,wherein there is no exposure of the plurality of terminals and terminalleads at side edges of the sealing member; and wherein the metal layeris formed by a printing process.
 13. The method according to claim 12,wherein a back surface of the semiconductor element is exposed from thesealing member.
 14. The method according to claim 12, wherein theplurality of terminals are fixed to the tape through a first adhesive,and the semiconductor element is fixed to the tape through a secondadhesive.
 15. The method according to claim 12, wherein the tape isformed by a resin film selected from polyimide resin,ethylene-vinylacetate copolymer resin, polyolefin resin and methacrylateresin.
 16. The method according to claim 12, wherein the step (e) iscarried out while the back surface of the tape is held by vacuumsuction.
 17. The method according to claim 12, wherein the number ofrows and the number of columns is two.